Performance characteristics of parallel SOVA Algorithm

Ruckmani S.R*, P. Anbalagan**
*Research Scholar,Department of Electrical Engineering,Coimbatore Institute of Technology,Coimbatore ,India.
**Faculty of Electrical Engineering,Coimbatore Institute of Technology ,Coimbatore ,India.
Periodicity:February - April'2007
DOI : https://doi.org/10.26634/jfet.2.3.826

Abstract

Turbo coding is a powerful encoding and decoding technique that can provide highly reliable data transmission at extremely low signal-to-noise ratio. According to the computational complexity/delay of the employed decoding algorithms, such as maximum a posteriori algorithm (MAP), log maximum a posteriori algorithm (Log-MAP) and Soft Output Viterbi Algorithm (SOVA), the realization of turbo decoders usually takes a large amount of memory space and potentially long decoding delay. Therefore, an efficient method to reduce decoding complexity/delay becomes one of the key factors toward successfully designing turbo decoders. In this paper, reducing decoding complexity/delay of turbo decoding algorithms is approached by parallel SOVA (T-SOVA) scheme.  The best schemes are presented for various variables considering trade-off between decoder performance and complexity. This method will reduce the decoding complexity/delay by at least 50% without big impact on the system performance.

Keywords

Forward error correction, turbo decoder, parallel SOVA decoding algorithm, reducing decoding complexity and memory usage.

How to Cite this Article?

Ruckmani S.R and P. Anbalagan (2007). Performance characteristics of parallel SOVA Algorithm. i-manager’s Journal on Future Engineering and Technology, 2(3), 63-71. https://doi.org/10.26634/jfet.2.3.826

References

[1]. C Berrou, A Glaviex, P Thitimajshima, "Near hannon limit error-correcting coding and decoding: Turbo¬codes", Proc. IEEEICC'93, Geneva, Switzerland, pp. 1064¬1070, May 1993.
[2]. J Hagenauer and P Hoher, "A Viterbi algorithm with soft outputs and its applications", Proc. IEEE GLOBECOM '89, Dallas, USA, pp. 1680-1686, Nov. 1989.
[3]. P Robertson, E Villebrun, and P Hoher, "A comparison of optimal and sub-optimal MAP decoding algorithms operating in the log domain", Proc. IEEE ICC '95, Seattle, USA, pp. 1009- 1013, June 1995.
[4].C Chaikalis, M Salimi-Khaligh, N Panayotopoulos, J M Noras, "Reconfiguration Reconf. SOVA/ log-MAP DEC 1 Reconf. SOVA/ log-MAP DEC 2 between soft output Viterbi and log maximum a posteriori decoding algorithms", Proc. IEE3G2000, London, UK, pp. 316-320, Mar 2000.
[5].J P Woodard and L Hanzo, "Comparative study of turbo decoding techniques: An overview", IEEE Trans, on Vehicular Technology, Vol. 49, No. 6, pp. 2208-2233, Nov. 2000.
[6]. S A Barbulesku, 'Iterative decoding of turbo codes and other concatenated codes', PhD thesis. University of South Australia, Feb 1996
[7]. L. Bahl, J. Cocke, F. Jelinek, and J. Raviv, "Optimal decoding of linear codes for minimizing symbol error rate", IEEE Transactions on Information Theory, Vol. 20, No. 5, pp, 284287, Mar. 1974.
[8]. S. A. Barbulescu, W. Farrell, P Gray, and M. Rice, "Bandwidth Efficient Turbo Coding For High Speed Mobile Satellite Communications", Proc. International Symposium on Turbo Codes and Related Topics, Brest, France, pp. 119126, Sept, 1997.
[9]. C. Berrou, A. Glavieux, and R Thitimajshima.."Near Shannon Limit Error-Correcting Coding and Decoding: Turbo-Codes", Proc. International Conference on Communications, Geneva, Switzerland, pp. 10641070, May 1993.
[10]. F. Chan, 'Viterbi decoding of turbo codes with short frames", Proc. Communication Theory Mini-Conference, Vancouver, BC, pp 4751 .June 1999.
[11].G. C. Clark and J. B. Cain, "Error-Correction Coding for Digital Communications", Plenum Publishing, New York, NY, 1981.
[12],J.A.Erfanian,S.Pasupathy, and G. Gulak, "Reduced complexity symbol detectors with parallel structures for ISI channels", IEEE Transactions on Communications, Vol. 42, no. 4, pp 16611671, Feb/Mar/Apr 1994.
[13]. V. Franz and J. B. Anderso,. "Concatenated decoding with a reduced-search BCJR algorithm", IEEE Journal on Selected Areas on Communication, Vol. 16, no. 2, pp. 186195, Feb. 1998.
[14]. F. Gilbert, A. Worm, and N. When, * Low Power Implementation of a Turbo-Decoder on Programmable Architectures", Proc., Asia South Pacific Design Automation Conference, Yokohama, Japan, pp. 400403, Jan.2001.
[15]. J. Hagenauer, E. Offer, and L. Papke, "Iterative decoding of binary block and convolutional codes", IEEE Transactions on Information Theory, Vol. 42, no.2, pp. 429445, Mar. 1996.
[16]. O. J. Joerssen, M. Vaupel, and H. Meyr. "Soft-output Viterbi Decoding: VLSI Implementation",Proc., IEEE Vehicular Technology Conference, Se-caucus, NJ, pp. 941944, May 1993
[17]. O. Y.H. Leung, C.W. Yue, and C.Y. Tsui., "Reducing Power Consumption of Turbo Code Decoder Using Adaptive Iteration with Variable Supply Voltage", Proc., International Symposium on Low-Power Electronics and Design, San Diego, CA, pp. 3641, Aug. 1999.
[18]. S. J. Simmons, "Breadth- first trellis decoding with adaptive effort",. IEEE Transactions on Communications, Vol. 38, no. l,pp. 312, Jan. 1990.
[19]. J. Proakis,“DigitalCommunications", McGraw-Hill, New York, NY, 1995.
[20].F.Chan and D.Haccoun, "adaptive veterbi decoding of convolutional codes over memoryless channels ,"IEEE Trans on comm.,Vol 45,no:11 ,pp 1389 1400, Nov 1997.
If you have access to this article please login to view the article or kindly login to purchase the article

Purchase Instant Access

Single Article

North Americas,UK,
Middle East,Europe
India Rest of world
USD EUR INR USD-ROW
Pdf 35 35 200 20
Online 35 35 200 15
Pdf & Online 35 35 400 25

Options for accessing this content:
  • If you would like institutional access to this content, please recommend the title to your librarian.
    Library Recommendation Form
  • If you already have i-manager's user account: Login above and proceed to purchase the article.
  • New Users: Please register, then proceed to purchase the article.