Parallel Prefix Adders based Matrix-Vector Multiplier for Iterative Methods in CDMA Communication Systems

Budarapu Prathyusha*, G. Naresh**
* PG Scholar, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.
** Assistant Professor, Department of Electronics and Communication Engineering, Sree Vidyanikethan Engineering College, Tirupati, India.
Periodicity:June - August'2016
DOI : https://doi.org/10.26634/jele.6.4.8089

Abstract

Iterative methods are the basic building blocks of communication systems and represent a dominating part of the system. So, it is necessary for the careful design of the system for optimal performance. The most computationally expensive operations in the iterative methods are the matrix-vector multiplications. Therefore, it is important to reduce the number of matrix-vector multipliers in the design to reduce the hardware consumption. In this paper, the authors have proposed a design of matrix-vector multiplier that can be used to implement the widely adopted iterative methods. By using Brent Kung adder, the computational performance is increased by reducing the hardware consumption. The proposed design uses the sparse structure of the matrix and the spreading code matrices have equal magnitude entries. The design and simulation results are promising and are shown to satisfy the most modern communication system requirements.

Keywords

Iterative Methods, Sparse Structure, Code Division Multiple Access (CDMA) System, Parallel Interference Cancellation, Multiple Access.

How to Cite this Article?

Prathyusha, B., and Naresh G. (2016). Parallel Prefix Adders based Matrix-Vector Multiplier for Iterative Methods in CDMA Communication Systems. i-manager's Journal on Electronics Engineering, 6(4), 18-23. https://doi.org/10.26634/jele.6.4.8089

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