An electronic circuit design based on Parallel Genetic Algorithm (PGA) is presented in this paper. The design uses SPICE Simulation Program with Integrated Circuit Emphasis to evaluate the circuit performance and compare it to the requirements. A Parallel Genetic Algorithm is designed and implemented on a group of desktop PCs running Windows XP nd and connected together using a standard Ethernet office network. The PGA is used in the design of several circuits, 2^nd order active Low Pass Filters, a 6^th order active LPF, (Low Pass Filter) and a CMOS (Complementary Metal Oxide Semiconductor) operational amplifier. The result shows the excellent extraction of circuit performance characteristics from the SPICE for different circuit types and also the importance of the algorithm increases as the complexity of the circuit increases. The parallelization achieved a speedup of about (19) times faster than a sequential implementation by using (20) processors. Further speedup is expected if more processors are used. The system is implemented using the C++ programming language.