Validation of IOV chain using OVM Technique

Gayathri S.*, S. Lavanya **
* Professor, Department of Electronics and Communication Engineering, Sri Jayachamarajendra College of Engineering, Mysuru, Karnataka, India.
** Department of Electronics and Communication Engineering, Sri Jayachamarajendra College of Engineering, Mysuru, Karnataka, India.
Periodicity:June - August'2018
DOI : https://doi.org/10.26634/jcir.6.3.14632

Abstract

Today, the utilization of pre-silicon system verification strategies within the business cannot guarantee that every error in system computer code or system hardware are discovered and removed before silicon (Si) becomes offered. Some system errors solely show up once the application software package is executed on the particular Si. Presently, the business spends on average more than 50% of the overall project time on post-silicon validation and debugging. At this stage, it is still terribly tough and time intense to rectify issues that ends up in higher development price, slippery deadlines, and a possible loss of consumer. Therefore, an efficient method for debugging errors is used called Design for Debug (DFD). The DFD strategies prevailing nowadays are everywhere for over a decade. There are numerous examples throughout the industry, where the inclusion and subsequent use of DFD features have contributed significantly to a reduction in Time to Market (TTM). This paper proposes a DFD Validation of In-die variation (IDV), On-die Droop inducer (ODI), and Voltage Droop monitor (VDM) to reduce manufacturing defects or errors of chip, such as Variation of Process, Power Domain voltages and also variation of current inducer needed for chip.

Keywords

Design for Debug, Time to Market, In-die Variation, On-die Droop Inducer, Voltage Droop Inducer.

How to Cite this Article?

Gayathri, S., and Lavanya, S. (2018). Validation of IOV Chain using OVM Technique. i-manager’s Journal on Circuits and Systems, 6(3), 28-35. https://doi.org/10.26634/jcir.6.3.14632

References

[1]. Auguston, M. (1995, May). Program Behavior Model based on Event grammar and its application for debugging automation. In AADEBUG (pp. 277-291).
[2]. Crouch, A. L. (1999). Design-for-test for Digital IC's and Embedded Core Systems (Vol. 34). Upper Saddle River, NJ: Prentice Hall PTR.
[3]. Genden, M. (2006, October). SoC and Multi-Core Debug: Are Design for Debug (DFD) features that are put in reuse cores sufficient for Silicon Debug? In Test Conference, 2006. ITC'06. IEEE International. IEEE.
[4]. Josephson, D. (2006, July). The good, the bad, and the ugly of silicon debug. In Proceedings of the 43rd annual Design Automation Conference (pp. 3-6). ACM.
[5]. Lewis, B. (2003). Debugging backwards in time. arXiv preprint cs/0310016.
[6]. Makris, Y., & Orailoglu, A. (1999, November). A module diagnosis and design-for-debug methodology based on hierarchical test paths. In Defect and Fault Tolerance in VLSI Systems, 1999. DFT'99 International Symposium on (pp. 339-347). IEEE.
[7]. Matsuda, A., & Ishihara, T. (2011, March). Developing an integrated verification and debug methodology. In Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011 (pp. 1-2). IEEE.
[8]. Otellini, P. (2009). Intel Quality System Handbook.
[9]. Vermeulen, B., & Goel, S. K. (2002). Design for debug: Catching design errors in digital chips. IEEE Design & Test of Computers, (3), 37-45.
[10]. Zapién, J. A. (2015, February). Debugging parallel programs using fork handlers. In Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores (pp. 112-121). ACM.
If you have access to this article please login to view the article or kindly login to purchase the article

Purchase Instant Access

Single Article

North Americas,UK,
Middle East,Europe
India Rest of world
USD EUR INR USD-ROW
Pdf 35 35 200 20
Online 35 35 200 15
Pdf & Online 35 35 400 25

Options for accessing this content:
  • If you would like institutional access to this content, please recommend the title to your librarian.
    Library Recommendation Form
  • If you already have i-manager's user account: Login above and proceed to purchase the article.
  • New Users: Please register, then proceed to purchase the article.